1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly, to a plasma display panel which improves emitting luminance, emitting efficiency, and exhaust ability.
2. Discussion of the Related Art
Generally, a plasma display panel which is a gas discharge display device is divided into a DC type, an AC type, and a hybrid type depending on its electrode structure. The DC type and the AC type are determined depending on exposure of the electrode to a discharge plasma. Namely, in the DC type, the electrode is directly exposed to the discharge plasma. In the AC type, the electrode is indirectly combined with the plasma through a dielectric. This difference is generated by a difference of discharge phenomenon between the DC type and the AC type. In case of the AC type, charge particles formed by discharge are staked on a dielectric layer. That is, electrons are stacked on the dielectric layer on an electrode to which positive(+) potential is applied while ions are stacked on the dielectric layer on an electrode to which negative(xe2x88x92) potential is applied.
A related art AC type plasma display panel of three-electrode area discharge type will be described with reference to FIG. 1.
As shown in FIG. 1, the related art plasma display panel of three-electrode area discharge type includes a first substrate 1 and a second substrate 1a. X electrode 4, Y electrode 2, and Z electrode 3 are formed in a matrix arrangement. Namely, the Y electrode 2 and the Z electrode 3 are formed on the first substrate 1 in a row direction, and the X electrode 4 is formed on the second substrate la to cross the Y electrode 2 and the Z electrode 3.
A cell 5 is formed in a point where the respective electrodes cross one another. The Y electrode 2 is a scan electrode and is used for scanning of a screen. The Z electrode 3 is a sustain electrode and is used to sustain discharge. The X electrode 4 is an address electrode and is used for data input.
The X electrode 4 formed in each cell is connected to an X electrode driving circuit and receives an address pulse. The Y electrode 2 is connected to a Y electrode driving circuit and receives a scan pulse. The Z electrode 3 is connected to a Z electrode driving circuit and receives a sustain pulse.
A stripe type barrier and a well type barrier of the related art plasma display panel will be described with reference to the accompanying drawings.
FIG. 2a is a layout showing a stripe type barrier structure of the related art plasma display panel.
First, in the stripe type barrier structure, as shown in FIG. 2a, a plurality of first substrate electrode pairs consisting of Y electrode 11 and Z electrode 12 are formed in a row direction at constant intervals. Stripe type barriers 13 are formed across the first substrate electrode pairs at constant intervals. An X electrode(not shown) is formed in a central portion between the respective barriers. A reference numeral 21 which is not described denotes a discharge region and a reference numeral 22 denotes a main discharge region.
FIG. 2b is a sectional view taken along line I-Ixe2x80x2 of FIG. 2a, in which the first substrate is rotated by 90xc2x0. Referring to FIG. 2b, the first substrate electrode pairs consisting of Y electrode 11 and Z electrode 12 are formed on a first substrate 10. A first dielectric layer 15 is formed on the first substrate 10 including the first substrate electrode pairs. An X electrode 14 is formed on a second substrate 10a to cross the first substrate electrode pairs. The first substrate 10 and the second substrate 10a oppose each other. A second dielectric layer 16 is formed on the second substrate 10a including the X electrode 14. To avoid leakage between adjacent X electrodes, barriers 13 are formed at both sides of the X electrodes at a constant distance from the X electrodes. A phosphor layer 17 is formed on the barriers 13 and the second dielectric layer 16.
As described above, in the stripe type barrier structure, lower sides of the barriers 13 are located at a distance away from the main discharge region 22. Thus, the distance between the main discharge region 22 and the phosphor layer 18 below the barriers 13 is farther than the distance between the main discharge region 22 and the phosphor layer 18 above the X electrode 11. For this reason, loss occurs while ultraviolet rays generated by discharge reach a portion below the barriers.
FIG. 3 is a layout showing a well type barrier structure of the related art plasma display panel.
In the well type barrier structure, arrangement of electrodes are similar to that of FIG. 2a. In FIG. 2a, the barriers are formed only to cross the first substrate electrode pairs. However, in FIG. 3, barriers are formed to cross the first substrate electrode pairs and at the same time horizontal barriers 13a are also formed in a direction where the first substrate electrode pairs are formed.
For reference, the barriers formed to cross the first substrate electrode pairs are called vertical barriers 13 and the barriers formed in the same direction as the first substrate electrode pairs are called horizontal barriers 13a. However, as known from FIG. 3, four corner portions of the discharge region 21 are located at a distance away from the main discharge region 22, even though the well type barriers are formed.
The well type barriers are formed to prevent loss generated when ultraviolet rays by discharge reach a boundary portion of the cell from occurring in the stripe type barriers.
However, the stripe type barrier structure and the well type barrier structure of the related art plasma display panel have following problems.
First, in the stripe type barriers, although exhaust is easy, ultraviolet rays and visible rays may move toward the adjacent cell in vertical direction. In this case, error discharge and crosstalk may occur. Also, since the corner portions of the discharge region are away from the main discharge region, luminance is reduced.
Furthermore, in the well type barriers, although crosstalk between the adjacent cells can be avoided, exhaust is poor. For this reason, error discharge due to remaining gas may occur. Also, in the same manner as the stripe type barriers, since the corner portions of the discharge region are away from the main discharge region, luminance is reduced.
Accordingly, the present invention is directed to a plasma display panel that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a plasma display panel which prevents luminance from being reduced in corner portions of a discharge region and improves exhaust ability.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the scheme particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a plasma display panel according to the first embodiment of the present invention includes: a first substrate; a plurality of first substrate electrode pairs formed on the first substrate at constant intervals in one direction; a first dielectric layer formed on the first substrate including the first substrate electrode pairs; a second substrate; a plurality of second substrate electrodes formed on the second substrate at constant intervals to cross the first substrate electrode pairs; a second dielectric layer formed on the second substrate including the second substrate electrodes; first barriers formed on the second dielectric layer with the second substrate electrodes interposed therebetween; auxiliary barriers formed at both sides of the first barriers; a phosphor layer formed on the second dielectric layer including the first barriers; and second barriers formed in a boundary portion of upper and lower discharge cells on the second substrate to have a width which increases toward the first barriers from a central portion and to be separated from the first barriers.
A plasma display panel according to the second embodiment of the present invention includes: a first substrate; a plurality of first substrate electrode pairs formed on the first substrate at constant intervals in one direction; a first dielectric layer formed on the first substrate including the first substrate electrode pairs; a second substrate; a plurality of second substrate electrodes formed on the second substrate at constant intervals to cross the first substrate electrode pairs; a second dielectric layer formed on the second substrate including the second substrate electrodes; barriers formed on the second dielectric layer with the second substrate electrodes interposed therebetween; a phosphor layer formed on the second dielectric layer including the barriers; and a plurality of projections formed on the phosphor layer between the respective barriers at constant intervals in the same direction as the barriers.
A plasma display panel according to the third embodiment of the present invention includes: a first substrate; a plurality of first substrate electrode pairs formed on the first substrate; a second substrate; second substrate electrodes formed on the second substrate to cross the first substrate electrode pairs; a first dielectric layer formed on the second substrate including the second substrate electrodes; barriers formed on the first dielectric layer in first and second directions; and a second dielectric layer formed on the first substrate including the first substrate electrode pairs at a predetermined height, having a groove of a predetermined width and depth in the first and second directions on a surface region.
A plasma display panel according to the fourth embodiment of the present invention includes: a first substrate; a plurality of first substrate electrode pairs formed on the first substrate at constant intervals in one direction; a second substrate; a plurality of second substrate electrodes formed on the second substrate at constant intervals to cross the first substrate electrode pairs; first barriers formed on the second substrate with the second substrate electrodes interposed therebetween; and at least two or more second barriers formed in a boundary portion of upper and lower discharge cells on the second substrate to be separated from the first barriers and to maintain predetermined intervals among one another.
A plasma display panel according to the fourth embodiment of the present invention includes: a first substrate; a plurality of first substrate electrode pairs formed on the first substrate at constant intervals in one direction; a second substrate; a plurality of second substrate electrodes formed on the second substrate at constant intervals to cross the first substrate electrode pairs; first barriers formed on the second substrate with the second substrate electrodes interposed therebetween; and second barriers formed in a boundary portion of upper and lower discharge cells on the second substrate to be separated from the first barriers and to have a width of a surface opposite to the first barriers, which increases at a constant ratio or more than a width of the first barriers.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.